1. Field of the Invention
The present invention relates to a multilayer circuit board and a manufacturing method thereof. More particularly, the present invention relates to a multilayer circuit board that is adaptable to high-density wiring and that can achieve more reliable connections, and a manufacturing method thereof.
2. Description of the Related Art
Recent dramatic progress in micromachining technology for integrated circuits has led to an increase in number of connection terminals and finer pitches of the connection terminals. Integrated circuits have recently been mounted on ceramic substrates mainly by flip chip bonding. Thus, flip chip bonding pads disposed on a ceramic substrate must also be designed for the finer pitches of connection terminals. To this end, several methods have been proposed.
For example, Japanese Patent No. 2680443 proposes a ceramic circuit board that includes no connection pad. Connection pads are generally formed by printing. However, a larger number of connection pads are difficult to print. Furthermore, even when a larger number of connection pads can be formed, the bonding strength between via-hole conductors and the connection pads is too small to ensure the bonding. Thus, in a technique described in Japanese Patent No. 2680443, a ceramic multilayer substrate is manufactured using a conductive paste having a firing shrinkage smaller than those of ceramic green sheets, and conductor layers inside via-holes (via-hole conductors) protrude from the ceramic multilayer substrate as connection pads. This eliminates the printing of connection pads and increases the bonding strength between the connection pads and the via-hole conductors, thus achieving finer pitches of the connection pads. However, Japanese Patent No. 2680443 gives no consideration to a connection structure between via-hole conductors and line conductors within the ceramic multilayer substrate.
Japanese Unexamined Patent Application Publication No. 2001-284811 proposes a laminated ceramic electronic component having an improved connection structure between via-hole conductors and line conductors, wherein the line conductors include connection lands. Ceramic green sheets that include via-hole conductors and ceramic green sheets that include line conductors are properly laminated and are sintered to connect the via-hole conductors to the line conductors. An inevitable processing error during the formation of via-hole conductors and line conductors in the ceramic green sheets, and an inevitable misalignment between via-hole conductors and line conductors may lead to poor connection between the via-hole conductors and the line conductors. According to Japanese Unexamined Patent Application Publication No. 2001-284811, the poor connection resulting from the processing error and the misalignment is prevented by providing a line conductor with a connection land having a diameter larger than the outer diameter of a via-hole conductor.
Japanese Unexamined Patent Application Publication No. 11-074645 proposes a method for manufacturing a multilayer ceramic substrate that is adaptable to high-density wiring. As illustrated in FIGS. 7A and 7B, a connection land 3 is formed at the bottom of each via-hole conductor 2 in a multilayer ceramic substrate 1. When via-hole conductors 2 are adjacent to each other, connection lands 3 of the via-hole conductors 2 are disposed in their respective ceramic layers. The via-hole conductors 2 are connected to the line conductors 4 through the connection lands 3. This technique is the same as that in Japanese Unexamined Patent Application Publication No. 2001-284811 in that the connection lands 3 are provided.
According to Japanese Unexamined Patent Application Publication No. 2001-284811 and Japanese Unexamined Patent Application Publication No. 11-074645, the connection lands connected to the line conductors or the via-hole conductors can prevent the poor connection resulting from the misalignment between the via-hole conductors and the line conductors or from the processing error of the via-hole conductors and the line conductors in the manufacture of the ceramic substrate. However, as illustrated in FIG. 7A, because a connection land 3 horizontally protrudes from a via-hole conductor 2, the protrusion interferes with a finer pitch between adjacent via-hole conductors 2. More specifically, as illustrated in FIG. 8, a finer pitch between the adjacent via-hole conductors 2 may result in a short between the connection land 3 and the adjacent via-hole conductors 2. A finer pitch may also result in delamination between a ceramic layer and the connection land 3 during firing because of differences in the coefficient of thermal expansion. To prevent the short and the delamination, therefore, a clearance is required between the via-hole conductors 2. This clearance, as well as the protrusion of the connection land 3, interferes with the finer pitch between the via-hole conductors 2.